set_sim_clk

-port

Specify the clk port to configure

-frequency

Specify the output duty cycle, the value is [0, 1]

-phase

Specifies the clock tick on which the clk depends

-unit

specify the bus width when data is a bus

-adverse

Specifies the clock tick on which the input depends

---

-port

Specify the clk port to configure

attribute

type:

STRING

positional:

True

default:

related_options

simple case

There is currently no simple case.

---

-frequency

Specify the output duty cycle, the value is [0, 1]

attribute

type:

FLOAT

positional:

True

default:

related_options

simple case

There is currently no simple case.

---

-phase

Specifies the clock tick on which the clk depends

attribute

type:

FLOAT

positional:

False

default:

0

related_options

simple case

There is currently no simple case.

---

-unit

specify the bus width when data is a bus

attribute

type:

STRING

positional:

False

default:

KHz

related_options

simple case

There is currently no simple case.

---

-adverse

Specifies the clock tick on which the input depends

attribute

type:

BOOL

positional:

False

default:

related_options

simple case

There is currently no simple case.