create_generated_clock

-name

name for the clock

-add

add to the existing clock in source objects

-source_objects

list of ports and/or pins

-source

master source from which clock is generated

-master_clock

master clock from which clock is generated

-divide_by

frequency division factor

-multiply_by

frequency multiplication factor

-duty_cycle

high pulse width in percent for frequency multiply clocks

-invert

invert clock specification

-preinvert

pre invert clock specification

-edges

integer list of master clock edges

-edge_shift

float list of edge shifts

-combinational

clock source latency will derive from combinational paths only

-comment

comment string


-name

name for the clock

attribute

type:

STRING

positional:

False

default:

related_options

GroupType.TYPE_DEPENDENT:

name

simple case

There is currently no simple case.


-add

add to the existing clock in source objects

attribute

type:

BOOL

positional:

False

default:

related_options

simple case

There is currently no simple case.


-source_objects

list of ports and/or pins

attribute

type:

STRLIST

positional:

True

default:

related_options

GroupType.TYPE_LEAST:

source_objects

simple case

There is currently no simple case.


-source

master source from which clock is generated

attribute

type:

STRLIST

positional:

False

default:

related_options

GroupType.TYPE_LEAST:

source

simple case

There is currently no simple case.


-master_clock

master clock from which clock is generated

attribute

type:

STRLIST

positional:

False

default:

related_options

simple case

There is currently no simple case.


-divide_by

frequency division factor

attribute

type:

INT

positional:

False

default:

related_options

GroupType.TYPE_LEAST:

divide_by multiply_by edges combinational

GroupType.TYPE_CONFLICT:

divide_by multiply_by edges

simple case

There is currently no simple case.


-multiply_by

frequency multiplication factor

attribute

type:

INT

positional:

False

default:

related_options

GroupType.TYPE_LEAST:

divide_by multiply_by edges combinational

GroupType.TYPE_CONFLICT:

divide_by multiply_by edges

GroupType.TYPE_DEPENDENT:

multiply_by

simple case

There is currently no simple case.


-duty_cycle

high pulse width in percent for frequency multiply clocks

attribute

type:

FLOAT

positional:

False

default:

related_options

simple case

There is currently no simple case.


-invert

invert clock specification

attribute

type:

BOOL

positional:

False

default:

related_options

simple case

There is currently no simple case.


-preinvert

pre invert clock specification

attribute

type:

BOOL

positional:

False

default:

related_options

simple case

There is currently no simple case.


-edges

integer list of master clock edges

attribute

type:

INTLIST

positional:

False

default:

related_options

GroupType.TYPE_LEAST:

divide_by multiply_by edges combinational

GroupType.TYPE_CONFLICT:

divide_by multiply_by edges

GroupType.TYPE_DEPENDENT:

edges

simple case

There is currently no simple case.


-edge_shift

float list of edge shifts

attribute

type:

FLOATLIST

positional:

False

default:

related_options

simple case

There is currently no simple case.


-combinational

clock source latency will derive from combinational paths only

attribute

type:

BOOL

positional:

False

default:

related_options

GroupType.TYPE_LEAST:

divide_by multiply_by edges combinational

simple case

There is currently no simple case.


-comment

comment string

attribute

type:

STRING

positional:

False

default:

related_options

simple case

There is currently no simple case.