set_sim_reset
>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>

`-port`_
 Specify the reset port to configure


`-length`_
 Specify the output duty cycle, the value is [0, 1]


`-adverse`_
 Specifies the clock tick on which the input depends


`-validIndex`_
 specify the bus width when data is a bus




-----------------

.. _set_sim_reset-port:

-port
::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::

| Specify the reset port to configure

**attribute**

:type: STRING
:positional: True
:default: 

**related_options**



**simple case**

    There is currently no simple case.




-----------------

.. _set_sim_reset-length:

-length
::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::

| Specify the output duty cycle, the value is [0, 1]

**attribute**

:type: INT
:positional: True
:default: 

**related_options**



**simple case**

    There is currently no simple case.




-----------------

.. _set_sim_reset-adverse:

-adverse
::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::

| Specifies the clock tick on which the input depends

**attribute**

:type: BOOL
:positional: False
:default: 

**related_options**



**simple case**

    There is currently no simple case.




-----------------

.. _set_sim_reset-validIndex:

-validIndex
::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::

| specify the bus width when data is a bus

**attribute**

:type: INT
:positional: False
:default: 1

**related_options**



**simple case**

    There is currently no simple case.