set_input_delay >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>> `-delay`_ Specifies the path delay `-rise`_ Specifies that delay value refers to a rising transition on specified ports `-fall`_ Specifies that delay value refers to a falling transition on specified ports `-min`_ Specifies that delay value refers to the shortest path `-max`_ Specifies that delay value refers to the longest path `-clock`_ Specifies the clock to which the specified delay is related `-clock_fall`_ Specifies that the delay is relative to the falling edge of the clock `-reference_pin`_ Specifies the clock pin or port to which the specified delay is related `-level_sensitive`_ Specifies that the destination of the delay is a level-sensitive latch `-source_latency_included`_ Specifies that the clock source latency is not added to the input delay value `-network_latency_included`_ Specifies that the clock network latency is not added to the input delay value `-add_delay`_ Specifies whether to add delay information to the existing input delay or to overwrite `-port_pin_list`_ Specifies a list of input port or internal pin names ----------------- .. _set_input_delay-delay: -delay :::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: | Specifies the path delay **attribute** :type: FLOAT :positional: True :default: **related_options** :GroupType.TYPE_LEAST: delay **simple case** There is currently no simple case. ----------------- .. _set_input_delay-rise: -rise :::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: | Specifies that delay value refers to a rising transition on specified ports **attribute** :type: BOOL :positional: False :default: **related_options** **simple case** There is currently no simple case. ----------------- .. _set_input_delay-fall: -fall :::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: | Specifies that delay value refers to a falling transition on specified ports **attribute** :type: BOOL :positional: False :default: **related_options** **simple case** There is currently no simple case. ----------------- .. _set_input_delay-min: -min :::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: | Specifies that delay value refers to the shortest path **attribute** :type: BOOL :positional: False :default: **related_options** **simple case** There is currently no simple case. ----------------- .. _set_input_delay-max: -max :::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: | Specifies that delay value refers to the longest path **attribute** :type: BOOL :positional: False :default: **related_options** **simple case** There is currently no simple case. ----------------- .. _set_input_delay-clock: -clock :::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: | Specifies the clock to which the specified delay is related **attribute** :type: STRLIST :positional: False :default: **related_options** :GroupType.TYPE_DEPENDENT: clock **simple case** There is currently no simple case. ----------------- .. _set_input_delay-clock_fall: -clock_fall :::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: | Specifies that the delay is relative to the falling edge of the clock **attribute** :type: BOOL :positional: False :default: **related_options** **simple case** There is currently no simple case. ----------------- .. _set_input_delay-reference_pin: -reference_pin :::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: | Specifies the clock pin or port to which the specified delay is related **attribute** :type: STRLIST :positional: False :default: **related_options** :GroupType.TYPE_CONFLICT: reference_pin source_latency_included :GroupType.TYPE_CONFLICT: reference_pin network_latency_included **simple case** There is currently no simple case. ----------------- .. _set_input_delay-level_sensitive: -level_sensitive :::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: | Specifies that the destination of the delay is a level-sensitive latch **attribute** :type: BOOL :positional: False :default: **related_options** **simple case** There is currently no simple case. ----------------- .. _set_input_delay-source_latency_included: -source_latency_included :::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: | Specifies that the clock source latency is not added to the input delay value **attribute** :type: BOOL :positional: False :default: **related_options** :GroupType.TYPE_CONFLICT: reference_pin source_latency_included **simple case** There is currently no simple case. ----------------- .. _set_input_delay-network_latency_included: -network_latency_included :::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: | Specifies that the clock network latency is not added to the input delay value **attribute** :type: BOOL :positional: False :default: **related_options** :GroupType.TYPE_CONFLICT: reference_pin network_latency_included **simple case** There is currently no simple case. ----------------- .. _set_input_delay-add_delay: -add_delay :::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: | Specifies whether to add delay information to the existing input delay or to overwrite **attribute** :type: BOOL :positional: False :default: **related_options** **simple case** There is currently no simple case. ----------------- .. _set_input_delay-port_pin_list: -port_pin_list :::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: | Specifies a list of input port or internal pin names **attribute** :type: STRLIST :positional: True :default: **related_options** :GroupType.TYPE_LEAST: port_pin_list **simple case** There is currently no simple case.